These html pages are based on the PhD thesis "Cluster-Based Parallelization of Simulations on Dynamically Adaptive Grids and Dynamic Resource Management" by Martin Schreiber.
There is also more information and a PDF version available.

7.1 Inavsive hardware architecture


Figure 7.1: Example configuration of the invasive multi-tile architecture. See the text for a further information.

Here we give a short overview of the Invasive System architecture from the HPC perspective. An example configuration of the Invasive Chip is given in Fig. 7.1.